Quote Term Definitions |
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Customer Part Number: |
Your unique nomenclature assignment |
Revision: |
Your letter or number |
Layer Count: |
How many layers does your PCB have? |
X Dimension |
In inches, the most extreme measurement in the X axis of the individual PCB |
Y Dimension: |
In inches, the most extreme measurement in the Y axis of the individual PCB |
Array: |
Panelization configuration of individual PCBs to be tab routed or scored |
Array X Dimension: |
In inches, the most extreme array measurement in the X axis, including any rails or borders |
Array Y Dimension: |
In inches, the most extreme array measurement in the Y axis, including any rails or borders |
Array Up: |
Number of individual PCBs in the array configuration |
Tab-Rout: |
Tabs routed between each PCB for break-a-way. Unless otherwise noted, we use 100 mil spacing between boards |
Scoring: |
V-groove cut into both the top and bottom of the boards for break-a-way |
Material Type: |
Different types of laminate available for PCB fabrication |
Finish Thickness: |
The total thickness of the board including all plating and final finishes |
Finish Plating: |
Leaded Solder: 63/37 Tin/lead solder application |
Lead Free Solder: Tin/copper solder application |
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Deep Gold: Electrolytic gold plating finish |
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Selective Gold: Electrolytic gold plating on selected pads |
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Bare Copper: No plating finishes - an atypical request |
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Immersion Gold: 3-10 microinches of gold over electroless nickel (ENIG) |
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Immersion Tin: 1-5 microinches of tin (White Tin) |
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OSP: Organic Surface Protectant |
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Flash Gold: 1-3 microinches of electrolytic gold |
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Soft Gold: 99% pure, 30-100 microinches of gold (Wire Bondable Gold) |
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Carbon Ink: Conductive carbon paste selectively applied |
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Immersion Silver: 12-15 microinches of silver |
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Gold Fingers: |
Select the number of gold finger edges where "edge" is defined not as top or bottom but a side of the board. We bevel gold fingers unless otherwise specified. We do NOT bevel solder fingers unless specified by customer. Our standard bevel is 30 degrees leaving a .030" edge (+/-.005") on a .062" board. Optional bevels are as follows: |
45 degrees leaving .025" edge (+/-.005") |
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20 degrees leaving .071" edge (+/-.005") |
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Copper Weight (Outer): |
Number of ounces of copper per square foot on outer layers. Specify this as "finished" copper weight |
Copper Weight (Inner): |
Copper thickness required on inner layer cores, typically 1 oz |
Min. Trace/Space: |
Minimum trace width and spacing |
Soldermask: |
LPI: Liquid Photo Imageable mask |
Soldermask Sides: |
How many sides to mask |
Soldermask Color: |
Color of mask used to cover the PCB |
Smallest Hole Size: |
Smallest finished hole in mils |
Silkscreen: |
Reference characters to designate part locations |
Silkscreen Color: |
Color of ink printed on the board typically white |
Top SMD Pads: |
Number of Surface Mount Device pads on top side |
Bottom SMD Pads: |
Number of Surface Mount Device pads on bottom |
Minimum Pitch: |
Minimum distance between pad centers |
Plated Slots: |
Elongated holes used for component placement plated with copper |
Plated Edges: |
Edges of the board itself plated with copper |
Controlled Dielectric: |
Specified thickness of the insulating layers between a signal and power or ground planes |
Counterbore: |
A cylindrical recess, machined around a hole to allow a screw head to sit flush with a surface, plated or non-plated. |
Countersink: |
A beveled recess, machined around a hole to allow a screw head to sit flush with a surface, plated or non-plated. |
Controlled Impedance: |
Matching material properties with trace dimensions and locations to create specific electric impedance for a signal |
Quantities: |
List the number of individual board quantities to be quoted. Do not use array quantity |
Class 3: |
High Reliability Electronic Products where continued operation or performance on demand is critical. (i.e.. Flight controls or life support) |
MIL-PRF-55110G: |
A US Department of Defense specification that establishes the performance and qualification requirements for rigid printed wiring boards. Verification is accomplished through the use of one of two methods of product assurance (Qualified Product Listing or Qualified manufacturer listing). Certification is gained through product inspection and testing as well as manufacturing process verification. |
Etchback: |
On high reliability boards a process called etch-back is performed chemically with a potassium permanganate based etchant or plasma. The etch-back removes resin and the glass fibers so that the copper layers extend into the hole and as the hole is plated become integral with the deposited copper. |
AS9100: |
A standardized quality management system developed for the aviation, aerospace and defense industry suppliers that incorporates ISO-9001:2008 and industry requirements in an effort to provide improved quality and performance. Requires authorized registrar audit and certification. |
Castellated holes: |
Plated or non-plated edge of the board that includes a portion of each of a series of drilled holes. |
Buried Via : |
A via that does not extend to the surface of the board. |
Blind Via : |
A via extending to only one surface layer of the board |
Microvia: |
A blind or buried plated hole that is less than or equal to 0.006" in diameter. |
Via-In-Pad: |
Via in pad (VIP) is best defined as a via hole (either through hole or blind/buried) that is first drilled and copper plated then filled with a conductive (typically DuPont CB100)or non-conductive (typically San-Ei Kagaku PHP900 or Peters PP2795) epoxy plug ink/paste and finally cured to a hardened state. The fill material is planarized to create a flat surface across the PCB panel and then plated over with copper. After this step the final through holes are drilled or subsequent laminations (blind/buried vias) are done. In most applications these now “invisible holes” are used for solderable pads in SMT and BGA applications. |
Filled/Plugged Vias: |
A filled via has material applied into the hole with the intent of full penetration and encapsulation of the hole. A plugged via has material applied with the intent of only partially penetrating the hole from one or both sides of the board. |
Holes Plated .0015”: |
Requirement to have a minimum of .0015” (38um) copper plated on the hole walls. This requirement is greater than that called out in IPC-6012-2010 (18um for Class 1,2 and 20um for Class 3). Typically specified in high reliability and/or high current applications. |
Cores < .004”: |
Requirement in controlled dielectric or controlled impedance applications for cores that are less than .004”. These may require special handling and processing. |
Cover Coat: |
Layer of dielectric that covers the surface (one or both sides) of the board. This can be used when the boards need to be insulated from adjacent conductive surfaces (i.e. heat sinks) or in very high voltage applications. |
Cavity Process: |
Process that allows for portions on the inner-layers to be exposed. The exposed areas may have a surface finish and soldermask applied if required. Typically if there are holes within these areas they will need to be plugged and capped with copper, if possible avoid holes within the exposed areas. |
Controlled Depth Drilling: |
Process for drilling partially though the thickness of the boards. |
Back Drilling: |
The process of removing the unused portion “stub” of vias by drilling a larger hole from one or both sides after the plating processes. This is typically required in very high speed applications (10GHz or greater) to minimize the parasitic effects of the via stubs. |
Pem Nuts: |
Inserts that are either friction-fit or swaged into holes that contain internal threading for mechanical fastening. |
LPI Legend: |
Liquid Photo Imageable legend. Alternate to silkscreened or ink jetted legend when high resolution of small features is required. |
Edge Mill: |
Process used to reduce the thickness of the material along the board edges. Typically required when a thicker board is required to slide into card guides. |
Laser Rout: |
The utilization of Laser ablation to remove the boards for the production panel of to create internal cutouts. Typically required when the radius of mechanical milling tools too large to form the required profile. May also be required for some materials. |
Unique Serialization: |
The requirement for a specific number format or number range when the boards are serialized. |
Tetra Etch: |
Process for preparing the surface and hole walls of PTFE materials for the plating processes. Tetra-Etch® is a trademark of W.L. Gore & Associates |